54F652 transceivers/registers equivalent, transceivers/registers.
Y Independent registers for A and B buses Y Multiplexed real-time and stored data Y Choice of non-inverting and inverting data paths
’F651 inverting ’F652 non-inverting Y.
These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be clocked into the regist.
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